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Fix possible race condition and ensure proper reset flag detection

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This commit is contained in:
Leon Krieg
2024-09-20 23:51:44 +02:00
parent 208aadf3a3
commit a423144599
3 changed files with 6 additions and 3 deletions
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5
src/common/memory.c
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@@ -192,6 +192,8 @@ static void WriteRaw(int addr, byte data)
static byte ReadRaw(int addr) static byte ReadRaw(int addr)
{ {
byte data;
// The EEPROM Read Enable Signal EERE is the read // The EEPROM Read Enable Signal EERE is the read
// strobe to the EEPROM. When the correct address // strobe to the EEPROM. When the correct address
// is set up in the EEAR Register, the EERE bit // is set up in the EEAR Register, the EERE bit
@@ -214,7 +216,8 @@ static byte ReadRaw(int addr)
// Read from address // Read from address
EECR |= BIT(EERE); EECR |= BIT(EERE);
data = EEDR;
} }
return EEDR; return data;
} }

2
src/common/watchdog.c
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@@ -75,7 +75,7 @@ bool WDT_HasTriggered(void)
// JTD ISC2 – JTRF WDRF BORF EXTRF PORF // JTD ISC2 – JTRF WDRF BORF EXTRF PORF
// Is watchdog reset flag set? // Is watchdog reset flag set?
isreset = ((MCUCSR & BIT(3)) == 1); isreset = ((MCUCSR & BIT(WDRF)) != 0);
// XXX: Reset flag detection should be a separate // XXX: Reset flag detection should be a separate
// module to handle the different types. // module to handle the different types.