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Rename hardware simulation target and reference in README

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This commit is contained in:
Leon Krieg
2024-10-01 17:25:30 +02:00
parent a03d0705f5
commit 295c5b1ccf
2 changed files with 9 additions and 6 deletions
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10
Makefile
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@@ -64,11 +64,6 @@ flash: $(TARGET)
-U lock:w:0xFF:m \ -U lock:w:0xFF:m \
-U flash:w:$< -U flash:w:$<
.PHONY: run
run: $(TARGET)
$(E) "[SIM] $<"
$(Q) $(SIM) -m $(MCU) -f $(FREQ) $<
.PHONY: clean .PHONY: clean
clean: clean:
$(E) "[REM] $(TARGET)" $(E) "[REM] $(TARGET)"
@@ -90,6 +85,11 @@ check:
$(E) "[CHK] Not implemented." $(E) "[CHK] Not implemented."
$(Q) true $(Q) true
.PHONY: simulate
simulate: $(TARGET)
$(E) "[SIM] $<"
$(Q) $(SIM) -m $(MCU) -f $(FREQ) $<
.PHONY: listen .PHONY: listen
listen: opt/tools/serial-listen listen: opt/tools/serial-listen
$(E) "[RUN] $<" $(E) "[RUN] $<"

5
docs/README.md
View File

@@ -39,9 +39,12 @@ of these commands:
Isolated unit tests allow you to verify all testable Isolated unit tests allow you to verify all testable
components are behaving as expected. Please note that most components are behaving as expected. Please note that most
tests will be added later down the road, when the project tests will be added later down the road, when the project
has reached a more mature state. has reached a more mature state. There is also support for
testing on simulated hardware if you have
[simavr](https://github.com/buserror/simavr) installed.
make check make check
make simulate
You can listen on the serial debug interface by running You can listen on the serial debug interface by running
the command below. This will also initialize all optional the command below. This will also initialize all optional