Rename hardware simulation target and reference in README

This commit is contained in:
2024-10-01 17:25:30 +02:00
parent a03d0705f5
commit 295c5b1ccf
2 changed files with 9 additions and 6 deletions

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@@ -39,9 +39,12 @@ of these commands:
Isolated unit tests allow you to verify all testable
components are behaving as expected. Please note that most
tests will be added later down the road, when the project
has reached a more mature state.
has reached a more mature state. There is also support for
testing on simulated hardware if you have
[simavr](https://github.com/buserror/simavr) installed.
make check
make simulate
You can listen on the serial debug interface by running
the command below. This will also initialize all optional