Jump to reset vector when program exceeds specified watchdog timeout

src/common/watchdog.c

@@ -43,16 +43,16 @@ void WDT_Enable(void)
 	WDTCR = BIT(WDE) | BIT(WDP2) | BIT(WDP1) | BIT(WDP0);
 }
 
-void WDT_SetTimeout(unsigned char time)
+void WDT_SetTimeoutFlag(unsigned char flag)
 {
-	time = CLAMP(time, 7, 0);
+	flag = CLAMP(flag, 7, 0);
 
-	Info("Setting watchdog prescalar to %d...", time);
+	Info("Setting watchdog prescalar to %02X...", flag);
 
 	// Clear timer prescalar flags
 	WDTCR &= 0xF8; // 11111000
 
-	WDTCR |= time;
+	WDTCR |= flag;
 }
 
 bool WDT_HasTriggered(void)
@@ -88,8 +88,8 @@ bool WDT_HasTriggered(void)
 void WDT_Disable(void)
 {
 	// WDE can only be cleared if the WDTOE bit has
-	// logic level one. To disable an enabled Watchdog
-	// Timer, the following procedure must be followed:
+	// logic level one. To disable an enabled watchdog
+	// timer, the following procedure must be followed:
 
 	// 1. In the same operation, write a logic one to
 	// WDTOE and WDE. A logic one must be written to WDE
@@ -97,7 +97,7 @@ void WDT_Disable(void)
 	// operation starts.
 
 	// 2. Within the next four clock cycles, write a
-	// logic 0 to WDE. This disables the Watchdog
+	// logic 0 to WDE. This disables the watchdog.
 
 	// No interrupts while we set WDTCR;
 	ATOMIC_BLOCK(ATOMIC_RESTORESTATE) {
@@ -108,5 +108,13 @@ void WDT_Disable(void)
 
 void WDT_Reset(void)
 {
-	// TODO: Reset watchdog timer
+	// The WDR – Watchdog Reset – instruction resets the
+	// watchdog timer. The Watchdog Timer is also reset
+	// when it is disabled and when a chip reset occurs.
+
+	// If the reset period expires without another
+	// watchdog reset, the chip resets and executes from
+	// the Reset Vector.
+
+	__asm__("WDR");
 }