Jump to reset vector when program exceeds specified watchdog timeout
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@@ -43,16 +43,16 @@ void WDT_Enable(void)
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WDTCR = BIT(WDE) | BIT(WDP2) | BIT(WDP1) | BIT(WDP0);
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}
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void WDT_SetTimeout(unsigned char time)
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void WDT_SetTimeoutFlag(unsigned char flag)
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{
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time = CLAMP(time, 7, 0);
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flag = CLAMP(flag, 7, 0);
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Info("Setting watchdog prescalar to %d...", time);
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Info("Setting watchdog prescalar to %02X...", flag);
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// Clear timer prescalar flags
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WDTCR &= 0xF8; // 11111000
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WDTCR |= time;
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WDTCR |= flag;
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}
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bool WDT_HasTriggered(void)
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@@ -88,8 +88,8 @@ bool WDT_HasTriggered(void)
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void WDT_Disable(void)
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{
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// WDE can only be cleared if the WDTOE bit has
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// logic level one. To disable an enabled Watchdog
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// Timer, the following procedure must be followed:
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// logic level one. To disable an enabled watchdog
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// timer, the following procedure must be followed:
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// 1. In the same operation, write a logic one to
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// WDTOE and WDE. A logic one must be written to WDE
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@@ -97,7 +97,7 @@ void WDT_Disable(void)
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// operation starts.
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// 2. Within the next four clock cycles, write a
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// logic 0 to WDE. This disables the Watchdog
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// logic 0 to WDE. This disables the watchdog.
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// No interrupts while we set WDTCR;
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ATOMIC_BLOCK(ATOMIC_RESTORESTATE) {
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@@ -108,5 +108,13 @@ void WDT_Disable(void)
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void WDT_Reset(void)
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{
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// TODO: Reset watchdog timer
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// The WDR – Watchdog Reset – instruction resets the
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// watchdog timer. The Watchdog Timer is also reset
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// when it is disabled and when a chip reset occurs.
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// If the reset period expires without another
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// watchdog reset, the chip resets and executes from
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// the Reset Vector.
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__asm__("WDR");
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}
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@@ -4,7 +4,7 @@
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#include <stdbool.h>
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void WDT_Enable(void);
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void WDT_SetTimeout(unsigned char time);
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void WDT_SetTimeoutFlag(unsigned char flag);
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bool WDT_HasTriggered(void);
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void WDT_Disable(void);
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void WDT_Reset(void);
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