Keep interrupts enabled during rxbuf copy and fix possible constant name collision
This commit is contained in:
34
src/main.c
34
src/main.c
@@ -4,8 +4,8 @@
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#include <avr/interrupt.h>
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// Edge direction
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#define E_RISING 1
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#define E_FALLING 0
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#define D_RISING 1
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#define D_FALLING 0
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// Decoder state
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#define S_IDLE 0
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@@ -102,16 +102,23 @@ int RF_Receive(byte *data, int size)
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{
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int n = 0;
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cli();
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if (rxdone) {
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rxdone = false;
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while (n < size && n < (int) numdata) {
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if (!rxdone) {
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return 0;
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}
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// There is no race condition here since the decoder
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// will pause until all data has been processed and
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// the rxdone flag is unset.
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while (1) {
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if (n == size || n == (int) numdata) {
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break; // Finished copying
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}
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data[n] = rxbuf[n];
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n++;
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}
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}
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sei();
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rxdone = false;
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return n;
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}
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@@ -152,7 +159,7 @@ static void WaitPulse(void)
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static void HandleEdge(void)
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{
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if (rxdone || edgedir != E_RISING) {
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if (rxdone || edgedir != D_RISING) {
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return; // Ignore this edge
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}
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@@ -238,6 +245,11 @@ static void WriteBit(int val)
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*rxhead &= ~(0x80 >> bit);
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*rxhead |= (val << (7 - bit));
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// XXX: It would be better to separate state logic
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// from this helper function. Since the EOT sentinel
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// is 0xFF we can easily check for it by listening
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// for 16 short intervals in succession.
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if (bit == 7) {
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// Check for EOT sentinel
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if (*rxhead == 0xFF) {
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@@ -261,13 +273,13 @@ ISR(TIMER3_CAPT_vect)
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{
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TCNT3 = 0;
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edgecap = ICR3;
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edgedir = (PIN(B) & BIT(5)) ? E_RISING : E_FALLING;
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edgedir = (PIN(B) & BIT(5)) ? D_RISING : D_FALLING;
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// Must not simply toggle the edge direction bit since
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// we can miss very quick edge changes and run out of
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// sync with the actual port state.
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TCCR3B = (edgedir == E_RISING) ? 0x02 : 0x42;
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TCCR3B = (edgedir == D_RISING) ? 0x02 : 0x42;
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if (rxstate == S_IDLE) {
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HandleEdge();
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